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A communication mechanism for multiprocessor simulation systems

Electrical and Computer Engineering Arizona State University Tempe, Arizona 85281

This paper describes the organization of a multi processor system designed to analyze large systems such as power systems, global weather, and complex real-time systems. The configuration discussed handles up to 256 processors which can be inter connected using a new, high-speed communication method that takes advantage of the iterative com puting requirements of simulation problems. The communication scheme uses parallelism and address- mapping memories to achieve a very high interprocessor data-transfer rate. The solution of a large, sparse set of linear equations illustrates how the communi cation mechanism operates.

Key Words: computer architecture • digital simula tion • interprocessor communication, large-scale simulation • multiprocessor, parallel processor • sparse matrices

SIMULATION, Vol. 34, No. 2, 39-49 (1980)
DOI: 10.1177/003754978003400204


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