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SIMULATION
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OMEGA: A reconfigurable transputer-based digital simulator

Michael J. Morse

Department of Electronic and Electronic Engineering Leicester Polytechnic Leicester, UK

William Forsythe

Department of Electronic and Electronic Engineering Loughborough University Loughborough, UK

This paper describes a high performance digital simulator which is novel both in its design and its implementation. The basic simulator comprises 32 identical processing elements (PEs) interconnected through a global switch in a non-blocking arrange ment; each PE is a transputer and support circuitry configured in an unusual way. The processors operate with floating point arithmetic to avoid the problems of scaling, and a frame time of 0.1 msec., irrespective of problem size or complexity. The performance of the simulator has been validated using PEs to realize both linear and non-linear functions in a variety of simulations.

Key Words: transputers • floating point arithmetic • processing elements • simulator

SIMULATION, Vol. 58, No. 3, 163-173 (1992)
DOI: 10.1177/003754979205800306
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