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SIMULATION
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DSiMCluster: A Simulation Model for Efficient Memory Analysis Experiments of DSM Clusters

Worawan Marurngsith

Department of Computer Science, Faculty of Science and Technology, Thammasat University Pathum Thani, 12121, Thailand wmrs{at}cs.tu.ac.th

Roland N. Ibbett

Edinburgh Parallel Computing Centre, University of Edinburgh, Edinburgh, EH9 3JZ, United Kingdom, R.N.Ibbett{at}ed.ac.uk

The emergence of chip multiprocessors is leading to the rapid development of multicore clusters that provide distributed—shared memory (DSM) programming models, so called DSM systems. DSM systems allow applications to access data in a logically shared address space by abstracting away the distinction of physical memory location. However, a significant drawback of a DSM cluster is that it performs poorly on applications that require large shared memory because of the performance loss or overhead caused by memory locality. Consequently, an effective memory analysis methodology is mandatory to quantify the impact of such overhead. In this respect, a widely used technique is simulation. Nevertheless, both the intrinsically difficult design of cluster architectures and the rapid advance of DSM implementations impose a constraint on simulation model designs. In this paper we describe DSiMCluster, a simulation model for memory analysis experiments of a DSM cluster system. We capitalize on the observation that the components of a simulation model have to be highly reusable and provide automatic behavioral verification. That is, in order to maintain the accuracy of simulation results with the technological advances of target architectures, which grow extensively at the software level. We show that highly reusable simulation components can be created by implementing a system-oriented simulation on top of a well-founded and broadly applicable, discrete-event simulation engine. Our experimental results demonstrate that, with these operations, DSiMCluster provides an efficient framework for memory analysis experiments on a DSM cluster architecture within a reconfigurable, customizable and user-friendly environment.

Key Words: distributed—shared memory • DSM cluster • memory simulation • memory analysis

SIMULATION, Vol. 85, No. 6, 355-374 (2009)
DOI: 10.1177/0037549709104483


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